Project Overview
Complete Verilog digital modem lab. Implements pseudo-random bit sequence (PRBS) generators, NCO sine lookups, QPSK constellation mapping, and matched FIR filter modules for undergraduate telecom labs. ### Practical Student Engineering Solution Fully functional hardware demonstration prototype equipped with dedicated microcontrollers, precision sensors, actuators, and an interactive cloud/mobile telemetry dashboard. ### Key Learning Outcomes - Embedded C / MicroPython firmware architecture and sensor interfacing - IoT telemetry protocols (MQTT / HTTP / BLE / LoRaWAN) - Power regulation, hardware debugging, and PCB design principles - Comprehensive technical documentation aligned with IEEE academic standards
Modern commercial and industrial infrastructure requires automated, real-time sensing and telemetry. Conventional manual monitoring suffers from high latency, human error, and lack of predictive fault visibility for FPGA Digital Communication Trainer.
A turnkey engineering prototype integrating high-precision sensor modules, dedicated microcontroller unit, and cloud telemetry protocols to automate measurement, trigger alert thresholds, and provide remote dashboard control.